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Use the desktop instruction table for the T239 target

In plain words

We target Ampere machine code for the T239 with the instruction table of NVIDIA's desktop Ampere chips. We checked inside NVIDIA's own disassembler: its tables for the desktop SM86 chip and the SM88 target are byte for byte the same. Recordings made on a desktop card validate the translator against real Ampere silicon, but no Switch 2 shader or hardware has been tested.

Context and Problem Statement

The decoder is generated from the SM86 table, the desktop Ampere instruction set. The Switch 2's chip, the T239, has a GA10F GPU, which CUDA calls SM88. If its encodings differed, every handler keyed on SM86 would be wrong in places.

Decision Outcome

Keep the SM86 table. NVIDIA's disassembler, nvdisasm, accepts --binary SM88, and its built-in tables for SM86, SM87 and SM88 are byte-identical.

Compared with the committed table Result
CUDA version checked 13.1
Encoding classes, the table's rows None added or removed
Bit fields None changed
Decoder keys None changed
Opcode names Some marked internal, which would break the generated handler names
Every fixture word Disassembles the same under SM86 and SM88

NVIDIA's public open-gpu-doc headers also list the T239 under the same 3D class as the desktop GA102 family.

What this makes easy

  • Recordings from a desktop GA102 card check the SM86 encodings used by the translator.
  • Handler names stay the public, readable opcode names.

What this makes hard

  • Behaviour is only checked on desktop chips, so equality on a Switch 2 is assumed.

Confirmation

The extracted SM88 table is kept on gpu/sm88-table beside a diff summary; regenerate and diff it when a new CUDA ships.

Sources: scripts/sm_86_instructions.txt, scripts/decoder_generator.rs, CUDA 13.1 nvdisasm, open-gpu-doc classes/3d.